7.67.
In Fig. 7.67, 5 time slots are used to provide for an estimate of the channel to be used in the k 2
time slot (the center of the 5 time slot) window. What this means is that the DCH and CCH must be
stored in memory (e.g., FIFO), so channel estimates can be formed. Then the channel compensation
block traverses back into time to apply the channel estimate in the middle time slot. Traversing back
into time implies these samples are available to be operated on, so some buffering is required. It is the
addition of this buffer that introduces the time delay discussed above. This function must be performed
for each finger actively used in the RAKE receiver.
On the downlink, the P-CPICH is commonly used as the phase reference for coherent demodulation.
The pilot channel time slot and frame structure are continuous in time. However, on the uplink,
there is no pilot channel, simply time-multiplexed pilot bits. Since Layer 1 control information is also
time multiplexed on this channel, the pilot sequence and hence the channel estimate is discontinuous
in time. This is indicated in Fig. 7.67, where we have provided a time slot rate channel estimate
labeled hk(t), where k time slot number. A commonly used technique to overcome this shortcoming
is to use interpolation.
Pages:
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654