The AICH access slot #0 (AS #0) starts the same time as the P-CCPCH frame that has SFN
modulo-2 0. The downlink AICH access slots have a length of 5120 chips. The uplink PRACH
access slots are also of length 5120 chips. The uplink AS #k is transmitted from the UE p-a chips
before the reception of the downlink AS #k. The timing relationship between AICH and PRACH is
given in Fig. 7.55 (taken from 3GPP).
The variables shown in Fig. 7.55 are defined below:
p-a time between transmission of the uplink RACH preamble and downlink AICH
p-p time between consecutive transmission of the uplink RACH preambles
p-m time between transmission of uplink RACH preamble and RACH message
tPICH
384 CHAPTER SEVEN
FIGURE 7.54 Downlink physical channel frame timing relationship.
kth S-CCPCH
AICH Access
Slots
Secondary
SCH
Primary
SCH
tS-CCPCH,k
10 msec
tPICH
#0 #1 #2 #3 #14 #13 #12 #11 #10 #9 #8 #7 #6 #5 #4
Radio frame with (SFN modulo 2) = 0 Radio frame with (SFN modulo 2) = 1
tDPCH, n
P-CCPCH
Any CPICH
PICH for kth
S-CCPCH
Any PDSCH
nth DPCH
10 msec
Subframe
#0
HS-SCCH
Subframes
Subframe
#1
Subframe
#2
Subframe
#3
Subframe
#4
The distance between the uplink PRACH preamble transmissions is defined by p-p and controlled by
the AICH transmission timing (ATT) parameter, which is signaled from the higher layers to the UE.
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