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Joseph Boccuzzi

"Signal Processing for Wireless Communications"

The de-interleaver will essentially reverse these operations. Next we will present the deinterleaver
block diagram shown in Fig. 5.9.
FEC
Decoder
2i
i
...
...
i i + 1 (B??“1)i
From
Demodulator
FIGURE 5.9 Convolutional de-interleaving block diagram.
Depending on the actual FEC code used, the convolutional interleaving
can have the advantages of using less memory (or delay) elements
than the block interleaver. Additionally, this technique can
have a lower propagation time delay.
An alternative representation of the convolutional interleaver is
shown in Fig. 5.10, where it is created by diagonally splitting the
B N block interleaver matrix into two halves. Essentially this is
creating two triangular matrices.
In comparing this technique to the block interleaver given in the
previous section, we see the time delay of the convolutional interleaver
is N(B  1) bit times versus the 2BN that would be required
for the block interleaver. This time difference is less than half
between these two techniques.
Let us consider an example of B  3 symbols, here the memory
(or delay) elements are updated every time a new symbol is inserted.
Initially 3 symbols are introduced to the interleaver (NA not available)
(see Fig.


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