2k Bits (K = 0, . . ., 7)
Data2
NData2 Bits
DPDCH
TFCI
NTFCI Bits
Pilot
NPilot Bits
Data1
NData1 Bits
DPDCH DPCCH DPCCH
FIGURE 1.21 Frame structure for downlink DPCCH.
TABLE 1.8 Downlink DPDCH and DPCCH Fields
Channel Channel DPDCH DPCCH
Slot bit rate symbol bits/slot bits/slot
format #i (kbps) rate (ksps) SF Bits/Slot NData1 NData2 NTPC NTFCI Npilot
0 15 7.5 512 10 0 4 2 0 4
1 15 7.5 512 10 0 2 2 2 4
2 30 15 256 20 2 14 2 0 2
3 30 15 256 20 2 12 2 2 2
4 30 15 256 20 2 12 2 0 4
5 30 15 256 20 2 10 2 2 4
6 30 15 256 20 2 8 2 0 8
7 30 15 256 20 2 6 2 2 8
8 60 30 128 40 6 28 2 0 4
9 60 30 128 40 6 26 2 2 4
10 60 30 128 40 6 24 2 0 8
11 60 30 128 40 6 22 2 2 8
12 120 60 64 80 12 48 4 8 8
13 240 120 32 160 28 112 4 8 8
14 480 240 16 320 56 232 8 8 16
15 960 480 8 640 120 488 8 8 16
16 1920 960 4 1280 248 1000 8 8 16
Next we will discuss the downlink operations. The downlink spreading functionality is shown in
Fig. 1.23, where the coded composite transport channel is mapped to a QPSK symbol. These symbols
are channelized by an OVSF (Walsh) code assigned to a UE. The channelized symbol is then spread
by a complex-valued gold PN code.
20 CHAPTER ONE
X
I-Channel
PN
Code j ?— Control Walsh
X
Data
Walsh
+ X
LPF
LPF Q-Channel
Dedicated
Data Channel
Dedicated Control
Channel
Complex
Multiplication
FIGURE 1.
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