Sync 28 bits are allocated to the sync field to allow the mobile and base station to obtain bit-slot
synchronization in addition to a variety of signal processing functions such as channel estimation,
equalizer training, frequency offset estimation, and so forth.
CDVCC 12 coded bits are allocated to promote reliable control between the mobile and base
station, Coded Digital Verification Color Code (CDVCC). The uncoded bits, DVCC, are retransmitted
back to the base station in order to assist the base station in separating the desired traffic
channel from a co-channel signal.
Rsvd 12 bits were allocated as reversed for future usage. In the meantime, all zeros were transmitted
in their places.
SACCH 12 bits were allocated for the slow associated control channel (SACCH).
The modulation scheme used is /4-DQPSK with the signal constellation diagram in Fig 1.5,
where we have purposely drawn the axis states as circles and the nonaxis states as boxes; the reason
will become apparent in the next chapter, where we discuss modulation theory [6, 7].
This type of differential encoding allows for four phase changes per symbol time interval. The four
possible phase trajectories shown below will be controlled by the following differential encoding rule
4 CHAPTER ONE
SACCH
12
Data
130
CDVCC
12
Rsvd
12
Sync
28
Base Station Receive
Base Station Transmit
Data
130
Data
16
Sync
28
Data
122
SACCH
12
CDVCC
12
Data
122
Ramp
6
Guard
6
FIGURE 1.
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